Posts Tagged ‘Intel’

Video: Concurrent Collections (CnC) by Kathleen Knobe

Thursday, July 8th, 2010

Last May Kathleen Knobe of Intel visited CSCS giving a talk on Concurrent Collections (CnC). We are happy to share with you the video of her very interesting talk (click on the picture here below to start the movie).

A common approach in designing parallel languages is to provide some high level handles to manipulate the use of the parallel platform. This exposes some aspects of the target platform, for example, shared vs. distributed memory. It may expose some but not all types of parallelism, for example, data parallelism but not task parallelism. This approach must find a balance between the desire to provide a simple view for the domain expert and provide sufficient power for tuning. This is hard for any given architecture and harder if the language is to apply to a range of architectures. Either simplicity or power is lost.

Instead of viewing the language design problem as one of providing the programmer with high level handles, we view the problem as one of designing an interface. On one side of this interface is the programmer (domain expert) who knows the application but needs no knowledge of any aspects of the platform. On the other side of the interface is the performance expert (programmer or program) who demands maximal flexibility for optimizing the mapping to a wide range of target platforms (parallel / serial, shared / distributed,
homogeneous / heterogeneous, etc.) but needs no knowledge of the domain.

Concurrent Collections (CnC) is based on this separation of concerns. The talk will present CnC and its benefits.

Additional video formats »

Mike Patterson: Be consequent in Addressing Energy Issues in Your Datacenter

Wednesday, April 28th, 2010

More than 17 persons attended the presentation and open discussion with Mike Patterson, Senior Power and Thermal Architect at Intel Corporation.

Mike has been welcomed at ETH Zurich by Vittoria Rezzonico (hpc-ch and EPF Lausanne). An important message of Mike has been to be consequent in addressing energy issues in the data center. So it is important not only to plan, but also to measure and then manage the energy being used in a data center.

If you could not addend the presentation, then you can have a look to the slides of Mike Patterson .

The following  links and documents on airflow calculations and best temperature have been referenced during the presentation:

Green Grid:
http://www.thegreengrid.org/en/Global/Content/white-papers/Proxy-Proposals-for-Measuring-Data-Center-Efficiency
http://www.thegreengrid.org/en/Global/Content/Tools/EuropeanFreeCoolingTool

ASHRAE:
http://tc99.ashraetcs.org/documents/ASHRAE_Extended_Environmental_Envelope_Final_Aug_1_2008.pdf

Intel Energy Checker:
http://software.intel.com/en-us/articles/intel-energy-checker-sdk/

Mike in front of his first slide…

From left to right: Anne Koessler (Intel Switzerland), Mike Patterson (Intel), Vittoria Rezzonico (hpc-ch / EPF Lausanne)

Invitation to Round table with Mike Patterson (Intel’s Specialist Data Center Efficiency)

Friday, March 19th, 2010

hpc-ch is glad to announce a talk and round table discussion  by Mike Patterson, Senior Power and Thermal Architect at Intel Corporation:

Intel’s view on Data Center design and efficiency, challenges today and in the future – The focus lays on how to measure the efficiency and how the Datacenter owner can reduce their energy use, or apply more of it to the computational workload; Mike Patterson

April 9th, 12:00-14:30
ETH Zurich, Rämistrasse 101, 8006 Zurich
in the Building/Room HG F 33.1

The detailed agenda is available online or as PDF: Agenda Round Table Patterson Intel.

Michael K Patterson is a Senior Power and Thermal Architect working in the Eco-Technology Program Office in the Intel Architecture Group at Intel Corporation, Hillsboro, OR, where he works on power and thermal solutions for Intel’s next-generation server, client, storage, and communications products.  The work covers silicon level activity, through platform and rack level solutions, and on up to interface with Data Center power and cooling technologies.  He did his undergraduate work at Purdue University, received his MS degree in Management from Rensselaer Polytechnic Institute, and was awarded his MS and PhD in Mechanical Engineering from the University of Vermont.  His current technical interests include advanced closed-loop cooling systems, server power and thermal management technologies, server/datacenter interaction, and high density data center concepts.  He has been with Intel for 17 years.  He is a registered Professional Engineer.  He is the Chairman of the Data Center Technology and Strategy Committee for the Green Grid.  He is also a member of ASHRAE TC 9.9 and ASME.

The talk is open to all members and guest of hpc-ch.

To attend please register by sending an e-mail to delorenzi (at) cscs.ch until April 5th.

We would like to thank Anne Koessler of Intel Switzerland for having invited Mike to Switzerland for this round table.

We hope to meet many of you at this very interesting meeting.

For the organization committee

Michele De Lorenzi (CSCS) and
Vittoria Rezzonico (EPF Lausanne)

Case Study of University of Zurich and Intel on High-Performance Computing

Monday, January 25th, 2010

University of Zurich and Intel commonly announced a case study for the use of Intel® Xeon® processor 5500 and 5400 series for Schrödiger, the new Sun HPC system of the university.

UniZh_Intel

The University has been at the forefront of scientific research for many years and relies heavily on its HPC cluster to underpin complex calculations and simulations. Its environment was beginning to age, resulting in slow response times and even the inability to carry out certain simulations.

Dr. Alexander Godknecht, head of IT-infrastructure, bioinformatics and HPCN, IT Services at the University of Zürich, explains: “Many of our compute-heavy departments were having trouble getting what they needed out of the old platform. The astrophysics team, for example, needs large amounts of memory to carry out its calculations while the physical chemists require fast networks with low latency and multiple cores in order to get the compute performance to support their computations. Meanwhile, the biochemistry researchers were hardly able to compute their thousands of simulations as the time taken to do them was just too long.”

University of Zurich selected for the new HPC system called Schrödinger a solution provided by Sun and Intel. The environment deployed is underpinned by six 48-blade racks of Sun Blade X6275 server modules, powered by a total of 4,608 Intel Xeon processor 5500 series cores. Running a SUSE Linux Enterprise* operating system, it supports all the applications used by the various departments to ensure the cluster is kept free to run the parallel applications for which the Intel Xeon processor 5500 series is optimised.

“We’re confident that the new cluster provided by Sun and Intel will last us for a good few years and enable us to push ahead with new scientific breakthroughs that Schrödinger himself would be proud of,” concludes Dr. Godknecht. The industry has already recognised the University’s new cluster by ranking it 96th in the Top 500 Supercomputers worldwide.

While the cluster is currently used exclusively by scientists based at the University of Zürich, it forms a part of the general HPC strategy in Switzerland led by the Swiss National Supercomputing Centre (CSCS). Like other countries, Switzerland has a strategy for a national HPC infrastructure. A grid or a series of smaller clusters form the base of the pyramid, followed by big clusters like Schrödinger and at the top of the national pyramid will be the planned Petabytelevel Supercomputer at CSCS. By providing a platform where scientists can write and test codes for thousands of processing cores, the University of Zürich will be part of the Swiss national plan for High Performance Computing and Networking.

Press Release: Case Study Univerity of Zurich and Intel »